About the role
The application window is expected to close on
07/24/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.This position requires tha
Cisco/Curated role
ASIC Design Hardware Engineer - SDC/STA (Hybrid)
San Jose, California, United States of AmericaFull-timePosted 56 days ago0 applicants
HybridSupervisory Organization 1865843 (Ravi Narala)
Accepting applications
Type
Full-time
Mode
Hybrid
Level
Open
Skills mentioned
static timing analysis
asic design
sdc development
synopsys primetime
cadence tempus
rtos design
constraint modeling
block-level sdc
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